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This FAQ reviews how edge-based and OOK architecture work and looks at some of the tradeoffs that can help determine which is best for specific applications.

Edge-based communications use at least two data channels. A low-frequency (LF) channel with a bandwidth from DC to 100 kbps and a high-frequency (HF) channel with a bandwidth from 100 kbps up to 150 Mbps (Figure 1). In edge-based designs, a single-ended signal at the input of the HF channel is split into a differential signal. On the other side of the isolation barrier, two comparators convert the signals into differential pulses that are used to drive the NOR-gate flip-flops whose output feeds into the output multiplexer and into a decision control logic (DCL) circuit. The DCL measures the time between signal transients, and if the time between two consecutive transits exceeds a predetermined time limit, the DCL forces the multiplexer to switch from the HF to the LF channel.

The LF channel is pulse-width modulated (PWM) using an internal oscillator to provide an HF carrier frequency and create a signal that can pass through the isolation barrier. A low pass filter (LPF) at the output removes the HF carrier from the data stream before sending it on to the output multiplexer.

How does OOK work?
OOK uses an internal spread spectrum oscillator clock to modulate the incoming data stream. The clock frequency is outside the device’s data rate and produces OOK signaling, where one of the input states is represented by the carrier frequency transmission, and a lack of transmission is used to represent the other state (Figure 2).

On the receiving side of the isolator, a preamp boosts the incoming signal and is followed by an envelope detector that acts as a demodulator to recreate the original digital signal. Signal condition circuits are used to improve the common mode rejection of the channel boosting the CMTI.

Which is best?
That depends. Under some circumstances, like low data rates, OOK can consume more power than edge-based architecture. At higher data rates (above 10 Mbps), the OOK method consumes less supply current than the pulse encoding technique. The simpler logic used by OOK speeds operation resulting in lower propagation delays. In a motor drive, OOK’s lower propagation delay skew minimizes the need for blanking or deadtime in the PWM drive. That, in turn, decreases motor current distortion resulting in smoother motor operation and less bearing and coupling wear, improving efficiency, and supporting more reliable operation. In addition, OOK’s greater noise tolerance can result in more robust solutions. Depending on the isolator design, edge-based and OOK can both support high levels of common mode transient immunity (CMTI).

Summary
Edge-based and OOK are the two most common communication architectures found in digital isolators. Each offers performance benefits in certain applications. In LF systems, edge-based architecture can provide lower power consumption, while in HF applications, OOK becomes lower power. There are also tradeoffs based on propagation delay skew and noise tolerance between the two schemes. Properly deployed, both can provide high levels of CMTI.

References
Digital isolator design guide, Texas Instruments
The Complete Guide to Digital Isolators, ICRFQ.net
The Use of Robust Digital Isolators in the Harsh Environments of Electric Motor Drives, Analog Devices

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Industrial operations benefit from using high-efficiency motor drives. Galvanically isolated coreless transformers (CT), also called coupled inductor-based gate drivers, are key components enabling high reliability and high-efficiency motor drives. The CT isolation is fabricated on-chip and consists of metal spirals with SiO2 insulation (Figure 1). The resulting driver supports an input-to-output offset voltage of 2.3 kV, input-to-output propagation delay of 100 ns with a part-to-part variation of ±7 ns, and features a CMTI of 200 kV/µs. This device is also suited for use in solar inverters.

Solar energy harvesting installations use 1.5 kV power buses to reduce cable cross-section, weight, and cost while delivering high power. That requires that the power switches in the inverter are rated for at least 1.7 kV, with many designs using 2 kV switches for additional reliability. Solar inverters employ a closed-loop architecture where a digital controller modulates the power switch duty cycles to force the inverter output voltage amplitude and phase to match the grid. The use of integrated galvanically isolated drivers eliminates the need for external isolation components and simplifies system design. Each driver output is isolated, enabling a mix of positive and negative voltage rails to be used without latch-up concerns.

In these designs, feedback to the inverter controller is provided by CMOS-isolated AC current sensors. Depending on the package, these sensors can have up to 5 kVrms isolation. As a result of their monolithic CMOS construction, these current sensors deliver higher accuracy and reliability over a wider temperature range compared to discrete current sense transformers. In addition, the sensor is reset on a cycle-by-cycle basis using the inverter gate control signals eliminating the need for a separate reset circuit.

Digital interfaces & ΣΔ
In motor control applications, optical encoder feedback and resolve-to-digital conversion are often used in the feedback control system. More recently, digital isolators and galvanically isolated analog-to-digital sigma-delta (ΣΔ) modulators have appeared. These devices feature a 3.75 kV standoff voltage and high pulse precision. That enables high-performance motor systems that meet the latest efficiency standards and provide the control needed to minimize the harmonic content on the output of solar inverters.

In EV DC charging stations, ΣΔ modulators are used to sense the input and output currents and voltages of the power factor controller (PFC) in the AC input stage and the DC/DC output stage connected to the battery pack. That requires a high accuracy ΣΔ modulator. Galvanic isolation can be used to eliminate stray currents that can cause data errors across the barrier. It also provides high levels of CMTI. The integrated solution has 6 kV SiO2 isolation technology and dual channels that can transfer data between an HV and LV domain at up to 100 Mbps with a pulse distortion below 3 ns (Figure 2).

Summary
Digitally isolated gate drivers are increasingly important in a range of green energy applications, from industrial motor drives to solar inverters and EV chargers. In addition, isolated AC current sensors and isolated ΣΔ modulators can contribute to improved performance and higher reliability.

References
Advanced Digital Isolation Technologies Boost Solar Power Inverter Reliability, Skyworks
Advantages of coreless-transformer gate drivers over gate drive optocouplers, Infineon
Galvanically isolated products for DC EV charging stations, STMicroelectronics
Isolated Gate Drivers, Analog Devices

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