Reverse recovery at the system Level:

A SiC MOSFET integrated with a soft-body diode increases a converter circuit’s operating frequency and efficiency while decreasing the number of components.

Figure 1 shows a full bridge topology of a single-phase two-level converter and a pulse pattern that will cause a reverse recovery event. At t₀, all switches start in the off state. S₁ and S₄ are initially turned on during t_1, letting the current pass through the load. During t₂, S₄ returns to the off-state. The current must then change to the freewheeling path, which utilizes the body diode in S₂. This time is known as dead time, and the current will decay due to the path resistance. During the transition period between t₂ and t₃, S₄ turns back on, causing a shoot-through scenario that forces the body diode of S₂ to undergo reverse recovery. After the recovery instant, the parasitic inductance in the current path results in a voltage overshoot to maintain the current in the path.

Reverse recovery and softness factor

A snappy or reverse recovery occurs when a SiC diode transitions from “forward-conduction” to an “off-state.” To simplify the reverse recovery event, Figure 2 shows a diode’s ideal recovery current and voltage waveform (Fig. 2a) and a non-ideal current waveform for a MOSFET (Fig. 2b).

Fig. 2a shows two regions of time based on I_diode. From t₀ to t_{1, the reverse voltage VR (dashed line) application} forces the current to drop at a constant rate, dI/dt. During this period, the rate at which dI/dt changes is determined mainly by the applied V_R, circuit elements such as the complementary device’s external R_G, and parasitic circuit inductance. At the start of t_{1, excess carriers are removed from the drift region, and a depletion region begins to form, which build}s the voltage across the diode. The voltage reaches its target value V_R when I_rrm is met at t_{2, and there is no additional bias from the voltage source VR that increases} the current magnitude further. From t₂ to t_3, the voltage overshoots its target value as the parasitic inductance opposes the decreasing loop current, eventually settling at V_R. The voltage overshoot peak depends on the circuit’s parasitic inductance and rate of change of recovery current dI_r/dt_(max).

Typically, we use two formulas to evaluate the softness factor of a recovery event. Below is S1, a single-parameter ratio:

where t_a = t_2­– t₁ and t_b = t₃ – t₂.

When S₁ = 1, the time it takes for the current to reach Irrm equals the time it takes to return to 0 A or leakage values.

A second method of measuring the softness of a reverse recovery event is defined in the equation below:

Where: dI/dt is the current at the initial zero-crossing of the commuting current, and dI_r/dt_(max) is the max return current during t_b.

When S₂ = 1, the current flow rate into and out of the body diode is equivalent. Most devices never achieve an ideal S₁ and S₂ value. A snappy recovery will occur when S1 and S2 are less than 1, while a value greater than 1 is considered a soft recovery.

Figure 3 shows a half-bridge test circuit used to perform reverse recovery characterization. Like the pulse pattern described in Figure 1, the high-side device will initially switch on and off to allow a controlled amount of current to conduct through the body diode of the low-side MOSFET. The high-side device then turns back on, forcing the freewheeling current to commutate, overshoot, and eventually settle, completing the reverse recovery event. Test boards and other external circuitry should limit the influence on body diode characterization. Do your best to minimize the test board’s stray inductance in accordance with good PCB layout practice and ensure that the external circuitry is not limiting the switching capabilities of the MOSFET. Minimizing the area of the power and gate loops will reduce inductance and achieve greater switching control.

Managing reverse recovery and EMI

Temperature dependence is the major factor for V_DS overshoot and peak I_DS values during the reverse recovery event. Tests performed at high temperatures will provide “worst-case scenario” results. The free-wheeling current through the body diode slowly dissipates over time as heat. This heat causes a temperature change in the junction, decreasing the conductive path’s resistance and thus increasing the initial dI/dt.

Figure 4a shows the temperature dependence of the reverse recovery current. The test parameters include an R_G(ext) = 5 Ω, V_DS = 800 V, and I_D = 40 A. Increasing external gate resistance is recommended to achieve softer recovery characteristics such as reduced Q_rr, I_rrm, and dampened ringing. Improvements in reverse recovery obtained from increasing R_G(ext) are shown in Figure 4b). Higher gate resistance reduces the risk of snappy reverse recovery and can increase switching losses due to increased t_rr if overly dampened. Figure 4b) shows the reverse recovery current plotted versus time for various external R_G values. The reduced ringing effect in the current waveform will reduce unwanted EMI.

Table 1 demonstrates that increasing R_G will decrease dI/dt and Q_rr and dampen the initial oscillatory peak current level. In contrast, increasing R_G also increases t_rr, creating a tradeoff between overshoot and switching times. Always visually inspect the waveform  after measuring it.

Impact of reverse recovery on voltage and energy

You must also consider reverse recovery effects on voltage to ensure a power circuit won’t exceed the device’s safe operating area (SOA). Parasitic inductance in the commutating current path causes an overshoot in the voltage waveform. If ignored, you will violate SOAs and reduce the system efficiency and lifetime of the semiconductor device.

Figure 5a shows the I_SD recovery waveform of the low-side device as a function of time at T = 125°C and V_DS = 800 V. Figure 5b shows the V_DS recovery waveform as a function of time and Figure 5c shows the peak V_DS value as a function of external gate resistance. The devices tested are in a half-bridge configuration with 4 dies in parallel per switch position. As expected, the V_DS peak decreases as R_G(ext) increases. An R_G(ext) >3 Ω is required to remain within the device’s SOA.

Conclusion

The circuits shown help you mitigate overshoot voltage and unwanted EMI during the reverse recovery of a SiC MOSFET body diode. Reverse recovery is an inherent occurrence in MOSFET body diodes, and negative effects are amplified by increased junction temperature. Board or module circuit parasitics create oscillatory voltage spikes that can break device SOA limitations. You should accurately characterize the softness factor of a MOSFET body diode to understand the benefits gained from mitigation techniques fully. Increasing external gate resistance is the most common method for softening recovery characteristics and managing V_DS overshoot.

References

1993. J. B. Mohit Bhatnagar, “Comparison of 6H-SiC, 3C-SiC, and Si for Power Devices,” IEEE Transactions on Electronic Devices, vol. 40, no. 3, pp. 645-655, 1993.Singh R., S. Ryu, J.W. Palmour, A.R. Hefner. J. Lai, “1500 V, 4 Amp 4H-Sic JBS Diodes,” in International Symposium on Power Semiconductor Devices, Toulouse, 2000.
Romero, A., “Capacitance Ratio and Parasitic Turn-on,” Wolfspeed Inc., Durham, 2023.
Yuan, X., S. Walder and N. Oswald, “EMI Generation Characteristics of SiC and Si Diodes: Influence of Reverse-Recovery Characteristics,” IEEE Transactions of Power Electronics, vol. 30, no. 3, pp. 1131-1136, 2015.

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In its seventh year, Design World’s LEAP Awards showcase the best engineering innovations across several design categories. This wouldn’t be possible without the commitment and support of the engineering community.

Congratulations to the LEAP Awards for Power Electronics winners, who are profiled here.

Gold

Power Integrations
InnoSwitch3-EP PSU IC with 1250 V GaN switch

This product has the highest voltage specification (1250 V) of any gallium-nitride (GaN) switch available on the market. This makes the InnoSwitch3-EP 1250 V the world’s highest-voltage, single-switch, gallium-nitride (GaN) power supply IC. This introduction extends the high efficiency/high power density benefits of GaN to an even wider range of applications, including many currently served by the most costly silicon-carbide technology. Currently, most companies can only offer GaN devices up to 750 V. 

InnoSwitch3-EP 1250 V ICs are the newest members of Power Integrations’ InnoSwitch family of off-line CV/CC QR flyback switcher ICs. The devices feature a 1250-volt PowiGaN GaN switch, positioning them as the world’s highest-voltage, single-switch gallium-nitride (GaN) power supply ICs. Other competitors have only released 750 V-rated parts. 

The switching losses for Power Integrations’ proprietary 1250 V PowiGaN technology are less than a third of those seen in equivalent silicon devices at the same voltage. This results in power conversion efficiency as high as 93%, enabling highly compact flyback power supplies that can deliver up to 85 W without a heatsink. 

InnoSwitch3-EP 1250 V ICs also feature synchronous rectification and FluxLink safety-isolated feedback circuitry. 

The 1250 V rating of the InnoSwitch3-EP 1250 V ICs means that devices can be used in applications with an operating peak voltage of 1000 V  since 1250 V provides enough headroom to allow for industry-standard 80% de-rating. This is particularly valuable in challenging power grid environments where robustness is an essential defense against grid instability, surge, and other power perturbations.

Silver

Empower Semiconductor
EC1005P

The new EC1005P is a 16.6-microfarad (μF) silicon capacitor device suitable for the most demanding power integrity targets, such as those often found in power-intensive high-performance systems-on-chips (SoCs). It features ultra-low impedance up to 1GHz, which is ideal for enhancing the power delivery network (PDN). With its low profile, the EC1005P easily embeds into the substrate or interposer of any SoC, making it optimal for high-performance computing (HPC) and artificial intelligence (AI) applications.

As the performance and power of SoCs constantly escalate, it is increasingly difficult to reach the power integrity level and voltage regulation these devices require with conventional multi-layer ceramic capacitors (MLCCs). The EC1005P features close-to-ideal parasitic parameters, allowing these SoCs to operate with reduced voltage margining and reduced system power.

The EC1005P leverages Empower’s high-performance and high-density silicon capacitor technology to fulfill the ‘last inch’ decoupling gap from the voltage regulators to the SoC supply pins. This approach substitutes several discrete components with much lower performance and a larger footprint with a single monolithic device that provides optimal electrical performance and simplifies the engineering design of the PDN and printed circuit board.

The EC1005P has an ultra-low sub-1-picohenry (pH) equivalent series inductance (ESL) and sub-3-milliohm (mΩ) equivalent series resistance (ESR) and is offered in a compact 3.643 x 3.036-millimeter package. The device has a 784-micron profile that can be customized for various height requirements. Empower’s silicon capacitors provide high stability over voltage and temperature and are not subject to derating or aging like traditional MLCCs.

Bronze

Eggtronic Engineering Spa
SmartEgg® — Single-Stage Zero Voltage Switching PFC and Regulator.

SmartEgg® is the EcoVoltas AC/DC architecture for medium-power applications that require Power Factor Correction (PFC). It is perfect for AC/DC power converters from 120W to 500W, achieving an extremely cost-effective Bill of Materials, high efficiency, and high power density.

SmartEgg offers a ZVS single-stage converter that can act as a PFC and an isolated regulator. This reduces the Bill of Materials by half, dramatically increases power density, and improves efficiency compared with traditional boost PFC + LLC resonant or AHB converters. SmartEgg is based on a proprietary magnetic component driven by a GaN half-bridge on the primary side.

Thanks to its innovative architecture, SmartEgg needs a single magnetic component for both PFC and regulation functionalities, which transfer energy to the secondary side in a quasi-forward mode. Because it does not store magnetic energy, SmartEgg reduces the size of transformers compared with Flyback and AHB architectures. Moreover, SmartEgg requires half the number of MOSFETs compared to Boost PFC + LLC and AHB converters. This leads to increased power density and extremely cost-effective converters.

Key features:

• Single-stage PFC + isolated regulator for 50% BOM reduction
• Forced Zero Voltage Switching (ZVS) under every load condition:
  • Up to 96% efficiency at full load
  • Up to 92% efficiency at light load

• Weak-coupling quasi-forward transformer (k < 1)
• Smaller size for up to 30W/in3 power density
• Available output options:
  • USB Power Delivery (USB PD 3.1)
  • Fixed voltage
  • CC CV battery charger
  • Multiport charger with dynamic balanced output power

The post Design World presents the 2024 LEAP Awards Winners: Power Electronics appeared first on Power Electronic Tips.

Square-shaped coils for wireless power transfer

Square coils (Figure 1) can provide a better coupling coefficient over various distances between the transmitter and receiver coil. These coils perform better under misalignment conditions; therefore, they are the preferred structure where precise alignment is challenging.

One major drawback with this shape is the perpendicular bendings, which result in higher resistive losses than other shapes. Even when designing PCBs, sharp bends are usually avoided to remove resistances. Therefore, the same principle applies to square coils for wireless power transfer.

Rectangular coils can be taken as a variant of the square coils, which find applications in specific cases where the product shape and size determine the use case. However, Figure 1 shows these coils have a much lesser coupling coefficient than square and circular ones.

Spiral-shaped coils for wireless power transfer

Spiral or circular coils (Figure 2) benefit from a uniform magnetic field, as they avoid sharp curves like square or rectangular coils. Due to their geometry, spiral or circular coils take minimal cover and are often preferred in compact products such as smartwatches and mobile phones. The coils can be easily customized in size and number of turns. Therefore, they are preferred during the initial stages of research and development of wireless charging products.

The same geometry of the spiral coils also poses various challenges. They are more sensitive to misalignment because they have a smaller coverage area than square and rectangular coils. The degree of alignment for spiral coils is critical for the best power transfer efficiency.

Pentagonal-shaped coils for wireless power transfer

Pentagonal coils (Figure 3) blend circular and square coils, providing a unique compromise in space utilization and design adaptability for specific applications. Their magnetic field distribution uses a wider cover area as with square coils while trying to achieve a smoother shape like the circular coil.

However, the design of a pentagonal coil is tricky and requires more care than its counterparts. The spacing between turns has to be uniform over the entire length, and the curves must be aligned. Their design usually has a trade-off between misalignment and coupling coefficient.

Case study

Here is a case study comparing the performances of square, spiral, and pentagonal coils due to the variations in distances between the coils. During the study, the surface area of the coils is kept at 110-120 mm². The spiral coil was noted to have 15 turns, while the pentagonal and square coils were kept at 14 turns. Note that both the transmitter and received coils are of the same shape.

Figure 4 shows how the increased distance between the coils decreases output power, energy efficiency, and coupling coefficiency. This is obvious to any electrical engineer. However, the spiral coil has an interesting pattern.

From all three parameters, one can observe that the spiral coil takes a noticeable sag when the distance between the coils reaches 20 mm. After that, the curve tends to be linear.

Another interesting observation is the relationship between the square and spiral coils. The performance starts at the same point, 10 mm, and ends at nearly the same point, 40 mm. However, the differences bulge at 20 mm and then converge.

However, the three graphs clearly show that the pentagonal coil outperforms its counterparts by a large margin, at least during the first half. When the distance reaches the 30 to 40 mm range, the performance differences shrink, especially for output power and energy transmission efficiency.

Engineers should note that the graph curves and the ranges in Figure 4 for all three coil shapes are applicable for the assumed number of turns and surface area of coils. Hence, when making a larger or smaller surface area of the coil with changes in the number of turns, the graphs are expected to change, especially on the x-axis for the distance range. Therefore, this is a good starting point if you consider expanding the study.

Summary

Understanding the performance of square, circular, and pentagonal coils gives us fundamental knowledge that can be expanded to other derivative shapes. In a case study, we have seen that pentagonal coils performed better than their counterparts for various parameters. However, due to their geometry, pentagonal coils require better design understanding, which can be challenging.

References

Design and Analysis of Magnetic Coils for Optimizing the Coupling Coefficient in an Electric Vehicle Wireless Power Transfer System, Energies, MDPI
Study of the Circular Flat Spiral Coil Structure Effect on Wireless Power Transfer System Performance, Energies, MDPI
A polygonal double-layer coil design for high-efficiency wireless power transfer, AIP Publishing
Wireless Power Transfer—A Review, Energies, MDPI
Analysis on Shape and Geometry Effects of Primary Secondary Coils for Dynamic Wireless Power Transfer System, International Journal of Intelligent Systems and Applications in Engineering

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