Sonics, Inc., today introduced ICE-G3™, the second product in the Energy Processing Unit (EPU) family based on the ICE-Grain Power Architecture™. ICE-G3 includes all of the on-chip power management capabilities of ICE-G1™ EPU with the addition of a key new component called the cluster controller. The cluster controller supports definition of complex power states at the system level and implements those system states by closely coordinating the actions of up to 256 lower-level power grain controllers in an EPU design. Sonics has also enhanced its EPU Studio™ development environment to ease definition and automate generation of cluster controllers.

“Power architects designing complex systems need tight control over system power state transitions to optimize their total energy savings,” said Drew Wingard, CTO of Sonics. “ICE-G3 provides greater system level abstraction for on-chip power management as the cluster controller orchestrates the action of local grain instances. The cluster controller allows designers to describe state transitions with hardware protection against making illegal state transitions and much better coordination of the operation of individual power grain controllers. For example, when turning power back on, the cluster controller ensures proper ordering and priority.”

As designers partition their system-on-chip (SoC) into a larger number of managed power grains to save energy, they often encounter increasing interdependencies across grains, especially during the sequencing of power state transitions. ICE-G3 cluster controllers enable designers to define cluster operating points with specific power states for each grain controller. The cluster controller maps incoming events into desired operating points, then sequences each grain controller to the specified power state based on user-defined ordering groups that can vary based on operating point.

Cluster controller operating points are more powerful than conventional system power states in several ways: 1) they provide hardware protection against illegal operating point transitions, which greatly simplifies power control verification; 2) they support hierarchy, so an SoC-level cluster controller can drive a set of subsystem-level controllers to exploit regularity and enhance reuse; and, 3) they are implemented in fast hardware, ensuring that system power control can leverage the massive MSPS (millions of power states per second) capabilities of EPUs – without losing the ability to change the power control system in software.

Sonics has built a customer engagement model for ICE-G3 that represents a first for semiconductor IP vendors. The EPU Studio Configuration Trial lets designers test drive the actual IP using the EPU Studio development environment and only requires execution of a simple NDA rather than a full Evaluation License. The Trial features a fully integrated, step-by-step tutorial to help designers grasp EPU concepts while they rapidly design an EPU for an IoT sensor design in the environment. To request the Configuration Trial, visit www.sonicsinc.com and click on the Free Trial button.